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IRFI4020H-117P features integrated half-bridge package reduces the part count by half facilitates better pcb layout key parameters optimized for class-d audio amplifier applications low r ds(on) for improved efficiency low qg and qsw for better thd and improved efficiency low qrr for better thd and lower emi can delivery up to 300w per channel into 8 ? load in half-bridge configuration amplifier lead-free package description this digital audio mosfet half-bridge is specifically designed for class d audio amplifier applications. it consists of two power mosfet switches connected in half-bridge configuration. the latest process is used to achieve low on-resistance per silicon area. furthermore, gate charge, body-diode reverse recovery, and internal gate resistance are optimized to improve key class d audio amplifier performance factors such as efficiency, thd and emi. these combine to make this half-bridge a highly efficient, robust and reliable device for class d audio amplifier applications. v ds 200 v r ds(on) typ. @ 10v 80 m q g typ. 19 nc q sw typ. 6.8 nc r g(int) typ. 3.0 ? t j max 150 c key parameters absolute maximum ratings parameter units v ds drain-to-source voltage v v gs gate-to-source voltage i d @ t c = 25c continuous drain current, v gs @ 10v a i d @ t c = 100c continuous drain current, v gs @ 10v i dm pulsed drain current p d @t c = 25c power dissipation w p d @t c = 100c power dissipation linear derating factor w/c e as single pulse avalanche energy mj t j operating junction and c t stg storage temperature range soldering temperature, for 10 seconds (1.6mm from case) mounting torque, 6-32 or m3 screw thermal resistance parameter typ. max. units r jc junction-to-case ??? 5.9 c/w r ja junction-to-ambient (free air) ??? 65 max. 5.7 36 20 200 9.1 21 8.5 0.17 10lb in (1.1n m) -55 to + 150 300 130 to-220 full-pak 5 pin g1, g2 d1, d2 s1, s2 gate drain source
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s d g repetitive rating; pulse width limited by max. junction temperature. starting t j = 25c, l = 8.6mh, r g = 25 ? , i as = 5.5a. pulse width 400s; duty cycle 2%. r is measured at
specifications refer to single mosfet. electrical characteristics @ t j = 25c (unless otherwise specified) parameter min. typ. max. units bv dss drain-to-source breakdown voltage 200 ??? ??? v ? v dss / ? t j breakdown voltage temp. coefficient ??? 24 ??? mv/c r ds(on) static drain-to-source on-resistance ??? 80 100 m ? v gs(th) gate threshold voltage 3.0 ??? 4.9 v ? v gs(th) / ? t j gate threshold voltage coefficient ??? -12 ??? mv/c i dss drain-to-source leakage current ??? ??? 20 a ??? ??? 250 i gss gate-to-source forward leakage ??? ??? 100 na gate-to-source reverse leakage ??? ??? -100 g fs forward transconductance 11 ??? ??? s q g total gate charge ??? 19 29 q gs1 pre-vth gate-to-source charge ??? 4.9 ??? q gs2 post-vth gate-to-source charge ??? 0.95 ??? nc q gd gate-to-drain charge ??? 5.8 ??? q godr gate charge overdrive ??? 7.4 ??? see fig. 6 and 15 q sw switch charge (q gs2 + q gd ) ??? 6.8 ??? r g(int) internal gate resistance ??? 3.0 ??? ? t d(on) turn-on delay time ??? 8.4 ??? t r rise time ??? 8.0 ??? t d(off) turn-off delay time ??? 18 ??? ns t f fall time ??? 4.0 ??? c iss input capacitance ??? 1240 ??? c oss output capacitance ??? 130 ??? pf c rss reverse transfer capacitance ??? 28 ??? c oss eff. effective output capacitance ??? 110 ??? l d internal drain inductance ??? 4.5 ??? between lead, nh 6mm (0.25in.) l s internal source inductance ??? 7.5 ??? from package diode characteristics parameter min. typ. max. units i s @ t c = 25c continuous source current ??? ??? 9.1 (body diode) a i sm pulsed source current ??? ??? 36 (body diode) v sd diode forward voltage ??? ??? 1.3 v t rr reverse recovery time ??? 76 110 ns q rr reverse recovery charge ??? 230 350 nc mosfet symbol r g = 2.4 ? t j = 25c, i f = 5.5a, v dd = 160v di/dt = 100a/s t j = 25c, i s = 5.5a, v gs = 0v showing the integral reverse p-n junction diode. conditions v gs = 0v, i d = 250a reference to 25c, i d = 1ma v gs = 10v, i d = 5.5a v ds = v gs , i d = 100a v ds = 200v, v gs = 0v v gs = 0v, v ds = 0v to 160v v ds = 200v, v gs = 0v, t j = 125c v gs = 20v v gs = -20v v gs = 10v i d = 5.5a v gs = 0v v ds = 50v, i d = 5.5a conditions and center of die contact v dd = 100v, v gs = 10v v ds = 100v v ds = 25v i d = 5.5a ? = 1.0mhz, see fig.5
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fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics fig 4. normalized on-resistance vs. temperature fig 6. typical gate charge vs.gate-to-source voltage fig 5. typical capacitance vs.drain-to-source voltage 0.1 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) vgs top 15v 12v 10v 9.0v 8.0v 7.0v bottom 6.0v 60s pulse width tj = 25c 6.0v 0.1 1 10 100 v ds , drain-to-source voltage (v) 0.1 1 10 100 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 6.0v 60s pulse width tj = 150c vgs top 15v 12v 10v 9.0v 8.0v 7.0v bottom 6.0v 3 4 5 6 7 v gs , gate-to-source voltage (v) 0.1 1 10 100 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) t j = 25c t j = 150c v ds = 50v 60s pulse width 1 10 100 1000 v ds , drain-to-source voltage (v) 10 100 1000 10000 c , c a p a c i t a n c e ( p f ) v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd c oss c rss c iss -60 -40 -20 0 20 40 60 80 100 120 140 160 t j , junction temperature (c) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( n o r m a l i z e d ) i d = 5.5a v gs = 10v 0 5 10 15 20 25 q g , total gate charge (nc) 0.0 2.0 4.0 6.0 8.0 10.0 12.0 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 160v v ds = 100v v ds = 40v i d = 5.5a
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fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. junction temperature fig 7. typical source-drain diode forward voltage fig 8. maximum safe operating area fig 10. threshold voltage vs. temperature 0.2 0.4 0.6 0.8 1.0 1.2 v sd , source-to-drain voltage (v) 0.1 1 10 100 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 25c t j = 150c v gs = 0v 25 50 75 100 125 150 t j , junction temperature (c) 0 2 4 6 8 10 i d , d r a i n c u r r e n t ( a ) 1e-006 1e-005 0.0001 0.001 0.01 0.1 1 10 100 t 1 , rectangular pulse duration (sec) 0.001 0.01 0.1 1 10 t h e r m a l r e s p o n s e ( z t h j c ) 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response ) notes: 1. duty factor d = t1/t2 2. peak tj = p dm x zthjc + tc ri (c/w) i (sec) 1.108 0.001041 2.172 0.148518 2.621 2.010100 j j 1 1 2 2 3 3 r 1 r 1 r 2 r 2 r 3 r 3 c ci= i / ri ci= i / ri -75 -50 -25 0 25 50 75 100 125 150 t j , temperature ( c ) 2.0 2.5 3.0 3.5 4.0 4.5 5.0 v g s ( t h ) , g a t e t h r e s h o l d v o l t a g e ( v ) i d = 100a 1 10 100 1000 v ds , drain-to-source voltage (v) 0.0001 0.001 0.01 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) operation in this area limited by r ds (on) tc = 25c tj = 150c single pulse 100sec 1msec 10msec dc
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fig 13a. maximum avalanche energy vs. drain current fig 12. on-resistance vs. gate voltage fig 13c. unclamped inductive waveforms fig 13b. unclamped inductive test circuit t p v (br)dss i as r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v v gs fig 14a. switching time test circuit fig 14b. switching time waveforms v gs v ds 9 0% 10% t d(on) t d(off) t r t f v gs pulse width < 1s duty factor < 0.1% v dd v ds l d d.u.t + - fig 15a. gate charge test circuit fig 15b gate charge waveform vds vgs id vgs(th) qgs1 qgs2 qgd qgodr 1k vc c dut 0 l 25 50 75 100 125 150 starting t j , junction temperature (c) 0 100 200 300 400 500 600 e a s , s i n g l e p u l s e a v a l a n c h e e n e r g y ( m j ) i d top 0.91a 1.1a bottom 5.5a 5 6 7 8 9 10 v gs, gate -to -source voltage (v) 50 75 100 125 150 175 200 225 250 275 300 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( m ? ) i d = 5.5a t j = 25c t j = 125c
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to-220 full-pak 5-pin part marking information data and specifications subject to change without notice. this product has been designed for the consumer market. qualification standards can be found on ir?s web site. ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information . 08/2006
! to-220 full-pak 5-pin package outline, lead-form option 117 (dimensions are shown in millimeters (inches))
note: for the most current drawings please refer to the ir website at: http://www.irf.com/package/

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